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الجمعة، 12 يونيو 2026

TSMC's new packaging technology will bring down chip cost and improve performance


<img src="https://fdn.gsmarena.com/imgroot/news/25/01/tsmc-made-in-america-chips-almost-ready/-184x111/gsmarena_001.jpg" width="184" height="111" hspace="3" alt="" border="0" align=left style="background:#333333;padding:0px;margin:0px 4px 0px 0px;border-style:solid;border-color:#aaaaaa;border-width:1px" /> <p>According to sources familiar with the matter, TSMC is working on a cutting-edge technology for chip packaging called CoPoS. CoPoS means Chip-on-Panel-on-Structure, and it uses a glass material that acts as a temporary carrier, and it also goes into the final substrate with a three-layer sandwich structure. Reportedly, TSMC will start mass production of chips using CoPoS by the end of 2028. The new tech will supposedly bring down manufacturing costs and improve performance. In fact, Nvidia's Feynman AI chipset will be the first one to use CoPoS. That's because the next-generation...</p> June 12, 2026 at 12:31AMvia GSMArena.com - Latest articles https://ift.tt/hfp2HJw

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TSMC's new packaging technology will bring down chip cost and improve performance

<img src="https://fdn.gsmarena.com/imgroot/news/25/01/tsmc-made-in-america-chips-almost-ready/-184x111/gsmarena_001.jpg" width=...